In 1970, Bill Harding envisioned a fully automated wafer-fabrication line that would produce integrated circuits in less than one day. Not only was such a goal gutsy 54 years ago, it would be bold even in today’s billion-dollar fabs, where the fabrication time of an advanced IC is measured in weeks, not days. Back then, ICs, such as random-access memory chips, were typically produced in a monthlong stop-and-go march through dozens of manual work stations.
At the time, Harding was the manager of IBM’s Manufacturing Research group, in East Fishkill, N.Y. The project he would lead to make his vision a reality, all but unknown today, was called Project SWIFT. To achieve such an amazingly short turnaround time required a level of automation that could only be accomplished by a paradigm shift in the design of integrated-circuit manufacturing lines. Harding and his team accomplished it, achieving advances that would eventually be reflected throughout the global semiconductor industry. Many of SWIFT’s groundbreaking innovations are now commonplace in today’s highly automated chip fabrication plants, but SWIFT’s incredibly short turnaround time has never been equaled.
SWIFT averaged 5 hours to complete each layer of its fabrication process, while the fastest modern fabs take 19 hours per processing layer, and the industry average is 36 hours. Although today’s integrated circuits are built with many more layers, on larger wafers the size of small pizzas, and the processing is more complex, those factors do not altogether close the gap. Harding’s automated manufacturing line was really, truly, swift.
A Semiconductor Manufacturing Manifesto
I encountered Harding for the first time in 1962, and hoped it would be the last. IBM was gearing up to produce its first completely solid-state computer, the System/360. It was a somewhat rocky encounter. “What the hell good is that?” he bellowed at me as I demonstrated how tiny, unpackaged semiconductor dice could be automatically handled in bulk for testing and sorting.
Author Jesse Aronstein [at far right, in top photo] took a break from managing the equipment group of Project SWIFT to play French horn one evening a week with the Southern Dutchess Pops Orchestra. Another key manager, Walter J. “Wally” Kleinfelder [bottom left], standing at right, headed the process group of Project SWIFT. William E. “Bill” Harding [bottom right], seen here in 1973, was a brusque WW II combat veteran and creative innovator. He conceived and directed IBM’s Project SWIFT, which succeeded in fabricating integrated circuits in one day.Clockwise from top: IBM/Computer History Museum; IBM (2)
William E. (“Bill”) Harding was an innovative thinker and inventor. He had been developing semiconductors and their manufacturing technology at IBM for three years when the company’s new Components Division was formed in 1961. Harding became a midlevel manager in the new division, responsible for developing and producing the equipment required to manufacture the System/360’s solid-state devices and circuit modules.
He was rough around the edges for an IBM manager. But perhaps it was to be expected of someone who had grown up in Brooklyn, N.Y., and was wounded three times in combat in World War II while serving in General George S. Patton’s Third Army. After the war, Harding earned bachelor’s and master’s degrees in mathematics and physics and became a member of IEEE.
I joined IBM in 1961, coming from rocket-engine development at General Electric. Like most engineers at the time, I knew nothing about semiconductor manufacturing. Five years prior, I had attended a vacuum-tube electronics course in which the professor described the transistor as “a laboratory curiosity, which may or may not ever amount to anything.”
Project SWIFT occupied a small space, shown here in yellow, in building 310 at IBM’s sprawling East Fishkill semiconductor facility. IBM
Harding’s rough and crude manner surfaced every time I crossed paths with him. If he ever went to IBM “charm school” (management training), there was no discernible evidence of it. Nevertheless, he succeeded in his mission. By 1964, solid-state logic modules for System/360s were flowing from the Components Division’s new facility on a former farm in East Fishkill.
In July 1970, I returned to IBM after three years of graduate study. I was a first-level manager for four years prior to that educational break, and did not want another management job. I wanted a purely technical career, and I joined East Fishkill’s Manufacturing Research (MR) group hoping to get one.
Harding and I then crossed paths again. In mid-August of 1970, he became MR’s top manager. Prior to that, he spent a year developing an IBM corporate strategy for the future manufacturing and use of very-large-scale integrated (VLSI) circuits. He was given command of MR to demonstrate the viability of his manufacturing concepts.
An assembly of MR personnel was convened to announce the management change. After being introduced, Harding described his view of future VLSI applications and manufacturing. These were his key points:
- VLSI circuits would be based on field-effect transistor technology (at the time, bipolar-junction transistors were dominant);
- Defect-free high yields would be paramount;
- Manufacturing would be fully automated;
- Best results would accrue from processing one wafer at a time;
- Short turnaround times would confer important benefits;
- Volume would scale up by replicating successful production lines.
After the educational lecture, Harding changed from professor to commander, General Patton–style. MR’s sole mission was to demonstrate Harding’s ideas, and ongoing projects not aligned with that goal would be transferred elsewhere within IBM or abandoned. MR would prove that an automated system could be constructed to process about 100 wafers a day, one at a time, with high yield and a one-day turnaround time.
What? Did I hear that right? One-day turnaround from bare wafer to finished circuits was what we would now call a moon shot. Remember, at the time, it typically took more than a month. Did he really mean it?
Harding knew that it was theoretically possible, and he was determined to achieve it. He declared that IBM would have a substantial competitive advantage if prototype experimental IC designs could be produced in a day, instead of months. He wanted the circuit designer to have testable circuits the day after submitting the digital description to the production line.
One-day turnaround from bare wafer to finished circuits was what we would now call a moon shot.
Harding immediately organized an equipment group and a process group within MR, naming me to manage the equipment group. I did not want to be a manager again. Now, reluctantly, I was a second-level manager, responsible for developing all the processing and wafer-handling equipment for a yet-to-be-defined manufacturing line that I had barely started to visualize. My dream research job had lasted little more than a month.
Walter J. (“Wally”) Kleinfelder transferred into MR to manage the process group. They would select the product to manufacture and define the process by which it would be made—the detailed sequence of chemical, thermal, and lithographic steps required to take a blank silicon wafer and build integrated circuits on its surface at high yield.
Kleinfelder selected a random-access memory chip, the IBM RAM II, for our demonstration. This product was being produced on-site at East Fishkill, so we would have everything we needed to build it and evaluate our results relative to those of the existing nonautomated manufacturing line.
IBM’s SWIFT Pilot Wafer Fab Had a Monorail “Taxi”
Integrated-circuit manufacturing involves first creating the transistors and other components in their proper places on the silicon wafer surface, and then wiring them together by adding a thin film of aluminum selectively etched to create the required wiring pattern. That thin film of conductor is known as the wiring, or metallization, layer.
IC manufacturing uses photolithography to create the many layers, each with a distinctive pattern, needed to fabricate an IC. These include the metal wiring layers, of which there can be more than a dozen for an advanced chip today. For these steps, the metal layer on the wafer is coated with a light-sensitive photoresist material, after which an image of the pattern is exposed on to it. The areas where conductors will be formed are blocked from the light. When the image is developed, the resist is removed from the pattern areas that were exposed, enabling these areas to be etched by an acid. The rest of the surface remains protected by the acid-proof resist. After etching is completed, the remaining protective resist is removed, leaving just the wiring layer in the required pattern.
